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1Self-Training for Sample-Efficient Active Learning for Text Classification with Pre-Trained Language Models
C. Schröder, and G. Heyer. Proceedings of the 2024 Conference on Empirical Methods in Natural Language Processing, page 11987--12004. Miami, Florida, USA, Association for Computational Linguistics, (November 2024)
7 days ago by @chsc842f
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myown
text_classification
llms
active_learning
self_training
myowntext_classificationllmsactive_learningself_training
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1BitSys: Bitwise Systolic Array Architecture for Multi-precision Quantized Hardware Accelerators
Y. Liu, S. Ullah, and A. Kumar. 2024 IEEE 32nd Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM), page 220-220. (2024)
2 months ago by @yuli164c
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systolic
hardware
myown
multiplier
quantization
systolichardwaremyownmultiplierquantization
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1The Precise Complexity of Reasoning in $ALC$ with $ømega$-Admissible Concrete Domains
S. Borgwardt, F. De Bortoli, and P. Koopmann. Proceedings of the 37th International Workshop on Description Logics (DL'24), volume 3739 of CEUR Workshop Proceedings, Bergen, Norway, CEUR-WS, (2024)
5 hours ago by @s5845789
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myown
myown
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1NetPU-M: a Generic Reconfigurable Neural Network Accelerator Architecture for MLPs
Y. Liu, S. Rai, S. Ullah, and A. Kumar. 2023 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW), page 85-92. (2023)
2 months ago by @yuli164c
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FPGA
Quantization
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Reconfiguration
myownFPGAQuantizationAcceleratorReconfiguration
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1High-Flexibility Designs of Quantized Runtime Reconfigurable Multi-Precision Multipliers
Y. Liu, S. Rai, S. Ullah, and A. Kumar. IEEE Embedded Systems Letters, 15 (4): 194-197 (2023)
2 months ago by @yuli164c
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myown
FPGA
Hardware
Multi-precision
Multiplier
Quantization
myownFPGAHardwareMulti-precisionMultiplierQuantization
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1Self-Training for Sample-Efficient Active Learning for Text Classification with Pre-Trained Language Models

1BitSys: Bitwise Systolic Array Architecture for Multi-precision Quantized Hardware Accelerators

1The Precise Complexity of Reasoning in $ALC$ with $ømega$-Admissible Concrete Domains

1NetPU-M: a Generic Reconfigurable Neural Network Accelerator Architecture for MLPs

1High-Flexibility Designs of Quantized Runtime Reconfigurable Multi-Precision Multipliers

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PUMA

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publications (hide)5 displayallpublications onlypublications per page5102050100 sort byadded attitleauthorpublication dateentry typehelp for advanced sorting... RSSBibTeXRDFmore...

1Self-Training for Sample-Efficient Active Learning for Text Classification with Pre-Trained Language Models

1BitSys: Bitwise Systolic Array Architecture for Multi-precision Quantized Hardware Accelerators

1The Precise Complexity of Reasoning in $ALC$ with $ømega$-Admissible Concrete Domains

1NetPU-M: a Generic Reconfigurable Neural Network Accelerator Architecture for MLPs

1High-Flexibility Designs of Quantized Runtime Reconfigurable Multi-Precision Multipliers

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