tag :: myown | PUMA

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1BitSys: Bitwise Systolic Array Architecture for Multi-precision Quantized Hardware Accelerators
Y. Liu, S. Ullah, and A. Kumar. 2024 IEEE 32nd Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM), page 220-220. (2024)
2 months ago by @yuli164c
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systolic
hardware
myown
multiplier
quantization
systolichardwaremyownmultiplierquantization
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1NetPU-M: a Generic Reconfigurable Neural Network Accelerator Architecture for MLPs
Y. Liu, S. Rai, S. Ullah, and A. Kumar. 2023 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW), page 85-92. (2023)
2 months ago by @yuli164c
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myown
FPGA
Quantization
Accelerator
Reconfiguration
myownFPGAQuantizationAcceleratorReconfiguration
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1High-Flexibility Designs of Quantized Runtime Reconfigurable Multi-Precision Multipliers
Y. Liu, S. Rai, S. Ullah, and A. Kumar. IEEE Embedded Systems Letters, 15 (4): 194-197 (2023)
2 months ago by @yuli164c
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myown
FPGA
Hardware
Multi-precision
Multiplier
Quantization
myownFPGAHardwareMulti-precisionMultiplierQuantization
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