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Disambiguation of "Kumar, Akash"

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BitSys: Bitwise Systolic Array Architecture for Multi-precision Quantized Hardware Accelerators

, , and . 2024 IEEE 32nd Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM), page 220-220. (2024)
DOI: 10.1109/FCCM60383.2024.00042

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Other publications of authors with the same name

NetPU-M: a Generic Reconfigurable Neural Network Accelerator Architecture for MLPs, , , and . 2023 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW), page 85-92. (2023)High-Flexibility Designs of Quantized Runtime Reconfigurable Multi-Precision Multipliers, , , and . IEEE Embedded Systems Letters, 15 (4): 194-197 (2023)BitSys: Bitwise Systolic Array Architecture for Multi-precision Quantized Hardware Accelerators, , and . 2024 IEEE 32nd Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM), page 220-220. (2024)