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2BitSys: Bitwise Systolic Array Architecture for Multi-precision Quantized Hardware Accelerators
Y. Liu, S. Ullah, and A. Kumar. 2024 IEEE 32nd Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM), page 220-220. (2024)
11 months ago by @yuli164c
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2High-Flexibility Designs of Quantized Runtime Reconfigurable Multi-Precision Multipliers
Y. Liu, S. Rai, S. Ullah, and A. Kumar. IEEE Embedded Systems Letters, 15 (4): 194-197 (2023)
11 months ago by @yuli164c
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FPGA
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