As runtime reconfiguration is used in an increasing number of hardware architectures, new simulation and modeling tools are needed to support the developer during the design phases. In this article, a language extension for SystemC is presented, together with a design methodology for the description and simulation of dynamically reconfigurable hardware at different levels of abstraction. The library presented offers a high degree of flexibility in the description of reconfiguration features and their management, while allowing runtime reconfiguration simulation, removal, and replacement of custom modules as well as third-party components throughout the architecture development process. In addition, our approach supports the emerging concept of nested reconfiguration and split regions with a minimal simulation overhead of a maximum of three delta cycles for signal and transaction forwarding, and four delta cycles for the reconfiguration process.
%0 Journal Article
%1 9547e881fdc240a286d192a49926d0ae
%A Haase, Julian
%A Charaf, Najdet
%A Groß, Alexander
%A Göhringer, Diana
%D 2024
%I Association for Computing Machinery (ACM), New York
%J ACM Transactions on Reconfigurable Technology and Systems
%K topic_federatedlearn FIS_scads imported
%N 3
%P 1--29
%R 10.1145/3662001
%T NC-Library: Expanding SystemC Capabilities for Nested reConfigurable Hardware Modelling
%V 17
%X As runtime reconfiguration is used in an increasing number of hardware architectures, new simulation and modeling tools are needed to support the developer during the design phases. In this article, a language extension for SystemC is presented, together with a design methodology for the description and simulation of dynamically reconfigurable hardware at different levels of abstraction. The library presented offers a high degree of flexibility in the description of reconfiguration features and their management, while allowing runtime reconfiguration simulation, removal, and replacement of custom modules as well as third-party components throughout the architecture development process. In addition, our approach supports the emerging concept of nested reconfiguration and split regions with a minimal simulation overhead of a maximum of three delta cycles for signal and transaction forwarding, and four delta cycles for the reconfiguration process.
@article{9547e881fdc240a286d192a49926d0ae,
abstract = {As runtime reconfiguration is used in an increasing number of hardware architectures, new simulation and modeling tools are needed to support the developer during the design phases. In this article, a language extension for SystemC is presented, together with a design methodology for the description and simulation of dynamically reconfigurable hardware at different levels of abstraction. The library presented offers a high degree of flexibility in the description of reconfiguration features and their management, while allowing runtime reconfiguration simulation, removal, and replacement of custom modules as well as third-party components throughout the architecture development process. In addition, our approach supports the emerging concept of nested reconfiguration and split regions with a minimal simulation overhead of a maximum of three delta cycles for signal and transaction forwarding, and four delta cycles for the reconfiguration process.},
added-at = {2024-11-28T16:27:18.000+0100},
author = {Haase, Julian and Charaf, Najdet and Gro{\ss}, Alexander and G{\"o}hringer, Diana},
biburl = {https://puma.scadsai.uni-leipzig.de/bibtex/2614663dc2b3282bbd4e52ce8edf536fb/scadsfct},
day = 27,
doi = {10.1145/3662001},
interhash = {fd289100b41b220fd224db20a5e6cf4a},
intrahash = {614663dc2b3282bbd4e52ce8edf536fb},
issn = {1936-7406},
journal = {ACM Transactions on Reconfigurable Technology and Systems},
keywords = {topic_federatedlearn FIS_scads imported},
language = {English},
month = apr,
note = {Publisher Copyright: {\textcopyright} 2024 Copyright held by the owner/author(s).},
number = 3,
pages = {1--29},
publisher = {Association for Computing Machinery (ACM), New York},
timestamp = {2024-11-28T17:41:03.000+0100},
title = {NC-Library: Expanding SystemC Capabilities for Nested reConfigurable Hardware Modelling},
volume = 17,
year = 2024
}
