BitSys: Bitwise Systolic Array Architecture for Multi-precision Quantized Hardware Accelerators. 2024 IEEE 32nd Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM), 220-220, 2024. [PUMA: systolic hardware myown multiplier quantization]
High-Flexibility Designs of Quantized Runtime Reconfigurable Multi-Precision Multipliers. IEEE Embedded Systems Letters, (15)4:194-197, 2023. [PUMA: myown FPGA Hardware Multi-precision Multiplier Quantization]