Publications

João Paulo C. de Lima, Asif Ali Khan, Hamid Farzaneh, and Jeronimo Castrillon. Efficient Associative Processing with RTM-TCAMs. In none (Eds.), 1st in-Memory Architectures and Computing Applications Workshop (iMACAW), co-located with the 60th Design Automation Conference (DAC'23), 2pp, July 2023. [PUMA: accelerator computing-in-memory myown] URL

Michael Niemier, Zephan Enciso, Mohammad Mehdi Sharifi, X. Sharon Hu, Ian O'Connor, Alexander Graening, Ravit Sharma, Puneet Gupta, Jeronimo Castrillon, João Paulo C. de Lima, Asif Ali Khan, Hamid Farzaneh, Nashrah Afroze, Asif Islam Khan, and Julien Ryckaert. Smoothing Disruption Across the Stack: Tales of Memory, Heterogeneity, and Compilers. In IEEE (Eds.), Proceedings of the 2024 Design, Automation and Test in Europe Conference (DATE), 1--10, IEEE, March 2024. [PUMA: accelerator compiler computing-in-memory myown nn] URL

João Paulo C. de Lima, Benjamin F. Morris III, Asif Ali Khan, Jeronimo Castrillon, and Alex K. Jones. Count2Multiply: Reliable In-memory High-Radix Counting. In arxiv (Eds.), 1-14, Arxiv, September 2024. [PUMA: LLM accelerator computing-in-memory myown] URL

João Paulo C de Lima, Asif Ali Khan, Luigi Carro, and Jeronimo Castrillon. Full-Stack Optimization for CAM-Only DNN Inference. In IEEE (Eds.), Proceedings of the 2024 Design, Automation and Test in Europe Conference (DATE), 1-6, IEEE, March 2024. [PUMA: NN accelerator computing-in-memory myown] URL

Hamid Farzaneh, João Paulo Cardoso de Lima, Mengyuan Li, Asif Ali Khan, Xiaobo Sharon Hu, and Jeronimo Castrillon. C4CAM: A Compiler for CAM-based In-memory Accelerators. In Association for Computing Machinery (Eds.), Proceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS'24), Volume 3, 164--177, Association for Computing Machinery, New York, NY, USA, May 2024. [PUMA: accelerator compiler computing-in-memory myown] URL

Yuhao Liu, Shubham Rai, Salim Ullah, and Akash Kumar. NetPU-M: a Generic Reconfigurable Neural Network Accelerator Architecture for MLPs. 2023 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW), 85-92, 2023. [PUMA: Accelerator FPGA Quantization Reconfiguration myown]