%0 Conference Paper %1 14bcef56bbe44c19b5cf82726cce9a69 %A Korol, Guilherme %A Jordan, Michael Guilherme %A Rutzig, Mateus Beck %A Castrillon, Jeronimo %A Beck, Antonio Carlos Schneider %B 2023 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2023 - Proceedings %C United States of America %D 2023 %E Kastensmidt, Fernanda %E Reis, Ricardo %E Todri-Sanial, Aida %E Li, Hai %E Metzler, Carolina %I IEEE Computer Society %K topic_software CNN, Computing, Edge FIS_scads FPGA, IoT, Offloading %R 10.1109/ISVLSI59464.2023.10238644 %T Design Space Exploration for CNN Offloading to FPGAs at the Edge %U https://www.ufrgs.br/isvlsi2023/ %X AI-based IoT applications relying on heavy-load deep learning algorithms like CNNs challenge IoT devices that are restricted in energy or processing capabilities. Edge computing offers an alternative by allowing the data to get offloaded to so-called edge servers with hardware more powerful than IoT devices and physically closer than the cloud. However, the increasing complexity of data and algorithms and diverse conditions make even powerful devices, such as those equipped with FPGAs, insufficient to cope with the current demands. In this case, optimizations in the algorithms, like pruning and early-exit, are mandatory to reduce the CNNs computational burden and speed up inference processing. With that in mind, we propose ExpOL, which combines the pruning and early-exit CNN optimizations in a system-level FPGA-based IoT-Edge design space exploration. Based on a user-defined multi-target optimization, ExpOL delivers designs tailored to specific application environments and user needs. When evaluated against state-of-the-art FPGA-based accelerators (either local or offloaded), designs produced by ExpOL are more power-efficient (by up to 2times) and process inferences at higher user quality of experience (by up to 12.5%).

@inproceedings{14bcef56bbe44c19b5cf82726cce9a69, abstract = {AI-based IoT applications relying on heavy-load deep learning algorithms like CNNs challenge IoT devices that are restricted in energy or processing capabilities. Edge computing offers an alternative by allowing the data to get offloaded to so-called edge servers with hardware more powerful than IoT devices and physically closer than the cloud. However, the increasing complexity of data and algorithms and diverse conditions make even powerful devices, such as those equipped with FPGAs, insufficient to cope with the current demands. In this case, optimizations in the algorithms, like pruning and early-exit, are mandatory to reduce the CNNs computational burden and speed up inference processing. With that in mind, we propose ExpOL, which combines the pruning and early-exit CNN optimizations in a system-level FPGA-based IoT-Edge design space exploration. Based on a user-defined multi-target optimization, ExpOL delivers designs tailored to specific application environments and user needs. When evaluated against state-of-the-art FPGA-based accelerators (either local or offloaded), designs produced by ExpOL are more power-efficient (by up to 2times) and process inferences at higher user quality of experience (by up to 12.5%).}, added-at = {2024-11-28T16:27:18.000+0100}, address = {United States of America}, author = {Korol, Guilherme and Jordan, {Michael Guilherme} and Rutzig, {Mateus Beck} and Castrillon, Jeronimo and Beck, {Antonio Carlos Schneider}}, biburl = {https://puma.scadsai.uni-leipzig.de/bibtex/2f844076e79b54d7ba00accd3a7d8a514/scadsfct}, booktitle = {2023 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2023 - Proceedings}, doi = {10.1109/ISVLSI59464.2023.10238644}, editor = {Kastensmidt, Fernanda and Reis, Ricardo and Todri-Sanial, Aida and Li, Hai and Metzler, Carolina}, interhash = {b7fdc203a3530c784d6b54668cf52e06}, intrahash = {f844076e79b54d7ba00accd3a7d8a514}, keywords = {topic_software CNN, Computing, Edge FIS_scads FPGA, IoT, Offloading}, language = {English}, note = {Publisher Copyright: {\textcopyright} 2023 IEEE.; 21th IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2023 ; Conference date: 20-06-2023 Through 23-06-2023}, publisher = {IEEE Computer Society}, series = {IEEE Computer Society Annual Symposium on VLSI}, timestamp = {2024-11-28T17:41:38.000+0100}, title = {Design Space Exploration for CNN Offloading to FPGAs at the Edge}, url = {https://www.ufrgs.br/isvlsi2023/}, year = 2023 }